Random access memory (RAM) such as static RAM (SRAM) and dynamic RAM (DRAM) are widely used in computation and communication systems today. Both SRAM and DRAM are volatile memories that lose data when the power is turned off. As mobile computing and communication systems become popular, intensive research and development in the memory area is now focusing on new non-volatile memories. A promising new non-volatile memory is based on phase-change-materials or PCM (such as, by way of example, Chalcogenide) by using its resistance changes in ordered (crystal, conductive) and disordered (amorphous, resistive) phases.
Although the PCM memory appears to be faster than traditional non-volatile technology such as FLASH, today's state of the art PCM prototypes are still much slower in speed than SRAM and DRAM. Specifically, for PCM RAM, the random access cycle time is limited by the write operation to the PCM system, which is much slower than the read operation. Also, the writing speeds for the binary “1”s and “0”s are quite asymmetric. Because the forming of the crystal state can be significantly slower than the forming of the amorphous state, the time required to form the “set phase” (denoted herein as write-“0” operation) is significantly longer than that for the “reset phase” (denoted herein as write-“1” operation).
Accordingly, a need exists for improved write operation techniques in PCM memory devices.